Dielectric coatings play an important role in achieving desired performance of III-V semiconductor opto-electronic devices. Dense, closely packed thin films are required to protect the surface, such as light emitting or receiving facets, of opto-electronic devices from contamination and oxidation. Antireflection coatings (AR) are also required on light emitting or receiving facets to increase the quantum efficiency of opto-electronic devices.
Dielectric thin films providing low midgap interface state density are required, in particular on light emitting facets, to minimize non-radiative energy-dissipating processes such as carrier recombination via interface states. Carrier recombination is known to trigger a process at laser facets called thermal runaway causing device failure especially when operated at high optical power.
Inversion channel field effect devices require dielectric films providing an unpinned Fermi level and low density of interface states below midgap (p-channel device) or above midgap (n-channel device) at the dielectric/semiconductor interface. Further, hysteresis-free, capacitance-voltage characteristics with excellent reproducibility of flatband voltage, small flatband voltage shift, and small frequency dispersion are required.
Also, passivation of states on exposed surfaces of electronic III-V devices requires low density of midgap interface states. A variety of materials have been proposed for such layers including ZrO2, Al2O3, SiOx, SiNx, SiNxOy, Y2O3, stabilized ZrO2, borosilicate glass and gallium oxide. Al2O3, SiOx, SiNx, SiNxOy, and borosilicate glass layers are fabricated with dielectric properties, but exhibit a pinned Fermi level near midgap with a midgap state density above 1013 cm−2eV−1 when deposited on bare III-V semiconductor layers. The midgap interface state density is in a range between 7×1011 cm−2eV−1 and 1013 cm−2eV−1 when deposited on GaAs samples previously treated by liquid or dry surface passivation techniques.
It is well known to those skilled in the art that a major shortcoming of GaAs-based semiconductor materials is the typically relatively poor quality and/or instability of the semiconductor/insulator interfaces produced by prior art methods. For instance, there is more difficulty with “native” oxides on GaAs than on InP. The quality of these interfaces is typically substantially less than the quality routinely attained in the Si/SiO, system.
In particular, the quality of GaAs/insulator interfaces typically is insufficient for many device applications, e.g., for GA-based MOSFETs or HBTs. Indeed, there are indications that in GaAs, the Fermi level is pinned even if the surface is atomically clean, requiring unpinning of the Fermi level. By “quality” of the semiconductor/oxide interface it is in reference to such device-relevant parameters as interface state density, interface recombination velocity, and thermo-chemical and photochemical stability.
Other attempts have been proposed to provide GaAs-based semiconductor/gallium oxide layer structures that yield interfaces of substantially improved quality. For example, it has been proposed in U.S. Pat. No. 5,821,171 to Hong et al. to provide a thin dielectric film on a GaAs-based semiconductor body having a major surface. The thin dielectric film comprises Ga2O3 fabricated by electron-beam evaporation of a single crystal, high purity Gd3Ga5O12, complex compound on substrates kept at a temperature within a range of from 40° to 370° C. and in a vacuum at or greater than 1×10−10 Torr. The major surface is prepared, prior to forming the thin dielectric film upon the major surface, to be substantially atomically clean. The major surface is atomically cleaned using any appropriate technique that results in essentially complete desorption of native oxide and other impurities from the surface.
Although this GaAs-based semiconductor/gallium oxide layer structure may yield interfaces of substantially improved quality, the process of preparing the structures is not particularly commercially feasible due to the requirements of the major surface having to be substantially atomically clean (the desorption of the native oxide layer) prior to forming the dielectric film and the forming of the dielectric layer in a very high vacuum environment.
In view of the advantages potentially available from GaAs-based electronic devices (e.g., FETs, HBTs) and integrated circuits, it would be highly desirable to have available a commercially practical method of making a GaAs-based semiconductor/gallium oxide layer structure that can yield interfaces of substantially improved quality.